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品牌:CYPRESS赛普拉斯
型号:CY14V101QS-BK108XI
1-Mbit (128K × 8) Quad SPI nvSRAM
Features General Description
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Density 1-Mbit (128K × 8) Bandwidth 108-MHz high-speed interface Read and write at 54 MBps Serial Peripheral Interface Clock polarity and phase modes 0 and 3 Multi I/O option – Single SPI (SPI), Dual SPI (DPI), and Quad SPI (QPI) High reliability Infinite read, write, and RECALL cycles One million STORE cycles to nonvolatile elements (SONOS FLASH Quantum trap) Data retention: 20 years at 85 °C Read Commands: Standard, Fast, Dual I/O, and Quad I/O Modes: Burst Wrap, Continuous (XIP) Write Commands: Standard, Fast, Dual I/O, and Quad I/O Modes: Burst Wrap Data protection Hardware: Through Write Protect Pin (WP) Software: Through Write Disable instruction Block Protection: Status Register bits to control protection Special instructions STORE/RECALL: Access data between SRAM and Quantum Trap Serial Number: 8-byte customer selectable (OTP) Identification Number: 4-byte Manufacturer ID and Product ID Store from SRAM to nonvolatile SONOS FLASH Quantum Trap AutoStore: Initiated automatically at power-down with a small capacitor (VCAP) Software: Using SPI instruction (STORE) Hardware: HSB pin Recall from nonvolatile SONOS FLASH Quantum Trap to SRAM Auto RECALL: Initiated automatically at power-up Software: Using SPI instruction (RECALL) Low-power modes Sleep: Average current = 280 µA at 85 °C Hibernate: Average current = 8 µA at 85 °C Operating supply voltages Core VCC: 2.7 V to 3.6 V I/O VCCQ: 1.71 V to 2.0 V Temperature range Extended Industrial: –40 °C to 105 °C Industrial: –40 °C to 85 °C Packages 16-pin SOIC 24-ball FBGA |
The Cypress CY14V101QS combines a 1-Mbit nvSRAM with a QPI interface. The QPI allows writing and reading the memory in either a single (one I/O channel for one bit per clock cycle), dual (two I/O channels for two bits per clock cycle), or quad (four I/O channels for four bits per clock cycle) through the use of selected opcodes. The memory is organized as 128Kbytes each consisting of SRAM and nonvolatile SONOS Quantum Trap cells. The SRAM provides infinite read and write cycles, while the nonvolatile cells provide highly reliable storage of data. Data transfers from SRAM to the nonvolatile cells (STORE operation) take place automatically at power-down. On power-up, data is restored to the SRAM from the nonvolatile cells (RECALL operation). You can also initiate the STORE and RECALL operations through SPI instructions.
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韩国JSC(EMLSI),NETSOL和美国Everspin半导体中国区指定一级代理 主要产品有: 1. Low power SRAM (低功耗静态随机存储器)1Mbit~8Mbit. 2. SPI SRAM(串行静态随机存储器)64Kbit~512Kbit. 3. PSRAM[Pseudo SRAM,UtRAM] (虚拟静态随机存储器)4Mbit~64Mbit. 4. Cellular RAM(伪静态随机存储器)4Mbit~64Mbit. 5.NvSRAM,F-RAM,MRAM(非易失性存储器)256Kbit~1Gbit 6. MCP 512Mbit+256Mbit,1Gbit+512Mbit,64Mbit+32Mbit,128Mbit+64Mbit,32Mbit+16Mbit 7. Mobile SDRAM/DDR(低功耗SDRAM/DDR)128Mbit~512Mbit |




